The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 15, 2008
Filed:
Jun. 25, 2004
Applicants:
Deshanand Singh, Toronto, CA;
Gabriel Quan, Toronto, CA;
Terry Borer, Toronto, CA;
Ian Chesal, Toronto, CA;
Valavan Manohararajah, Scarborough, CA;
Karl Schabas, Toronto, CA;
Stephen Brown, Toronto, CA;
Inventors:
Deshanand Singh, Toronto, CA;
Gabriel Quan, Toronto, CA;
Terry Borer, Toronto, CA;
Ian Chesal, Toronto, CA;
Valavan Manohararajah, Scarborough, CA;
Karl Schabas, Toronto, CA;
Stephen Brown, Toronto, CA;
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying registers on near-critical paths. The registers are moved to shorten lengths of one or more near-critical paths.