The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2008

Filed:

Sep. 30, 2005
Applicants:

Kevin D. Jones, Hayward, CA (US);

Thomas J. Sheffler, San Francisco, CA (US);

Kathryn M. Mossawir, Stanford, CA (US);

Qiang Hong, San Jose, CA (US);

Paul Wong, San Jose, CA (US);

Jing Jiang, Stanford, CA (US);

Inventors:

Kevin D. Jones, Hayward, CA (US);

Thomas J. Sheffler, San Francisco, CA (US);

Kathryn M. Mossawir, Stanford, CA (US);

Qiang Hong, San Jose, CA (US);

Paul Wong, San Jose, CA (US);

Jing Jiang, Stanford, CA (US);

Assignee:

Rambus Inc., Los Altos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for formally verifying designs having elements from more than a single design domain is described. An example system allows formal verification of a design containing mixed analog and digital subparts. The system may use different proof engines to solve an appropriate sub-partition of the entire design, and may provide a framework for translating between the different domains to create a unified result. For example, a digital proof engine may be used for a digital only subpart, while an analog proof engine may be used for an analog only subpart. The system may use the partitioning results to determine translators between the various domains, and an order in which the proof engines are applied.


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