The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2008

Filed:

Apr. 22, 2005
Applicants:

Norio Hayashi, Sawa, JP;

Noriyoshi Hagino, Tomioka, JP;

Toshiki Matsui, Takasaki, JP;

Kazuo Watanabe, Takasaki, JP;

Satoshi Tanaka, Kokubunji, JP;

Inventors:

Norio Hayashi, Sawa, JP;

Noriyoshi Hagino, Tomioka, JP;

Toshiki Matsui, Takasaki, JP;

Kazuo Watanabe, Takasaki, JP;

Satoshi Tanaka, Kokubunji, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides a signal processing semiconductor integrated circuit of the direct conversion system, which includes a dummy amplifier having the same circuit configuration as a low noise amplifier being the first stage amplifier, in which the DC offset calibrations on the subsequent stage amplifiers are carried out during shifting into the reception mode in a state that the low noise amplifier is deactivated and the dummy amplifier is activated. Thereby, the invention achieves to suppress generation of the DC offsets resulting from the leakage noises of the local oscillator during shifting into the reception mode, and to enhance the reception sensitivity.


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