The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2008
Filed:
Aug. 20, 2003
Wingyu Leung, Cupertino, CA (US);
Kit Sang Tam, Belmont, CA (US);
Mikolaj Tworek, Kanata, CA;
Fu-chieh Hsu, Saratoga, CA (US);
Wingyu Leung, Cupertino, CA (US);
Kit Sang Tam, Belmont, CA (US);
Mikolaj Tworek, Kanata, CA;
Fu-Chieh Hsu, Saratoga, CA (US);
MoSys, Inc., Sunnyvale, CA (US);
Abstract
A memory system with transparent error correction circuitry provides full stuck-at fault coverage for both test data patterns and the corresponding error correction code (ECC) values. The memory system includes a semiconductor memory having a memory array, a memory interface and an error detection/correction unit. The memory array is configured to store test data patterns and corresponding error correction code (ECC) values. The memory interface is configured such that the ECC values are not directly accessible. The error detection/correction unit is configured to correct single-bit errors in the test data patterns and corresponding ECC values. A set of test data patterns associated with the semiconductor memory is selected such that any multiple-bit error in a test data pattern and the corresponding ECC value causes the error detection/correction unit to provide an output data pattern having an error, thereby rendering multiple-bit faults 100% detectable.