The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2008

Filed:

Jan. 22, 2007
Applicants:

Billy Wayne Garrett, Jr., Mountain View, CA (US);

Nancy David Dillon, Legal Representative, Marshall, VA (US);

Michael Tak-kei Ching, Sunnyvale, CA (US);

William F. Stonecypher, San Jose, CA (US);

Andy Peng-pui Chan, San Jose, CA (US);

Matthew M. Griffin, Mountain View, CA (US);

Inventors:

Billy Wayne Garrett, Jr., Mountain View, CA (US);

Nancy David Dillon, legal representative, Marshall, VA (US);

Michael Tak-Kei Ching, Sunnyvale, CA (US);

William F. Stonecypher, San Jose, CA (US);

Andy Peng-Pui Chan, San Jose, CA (US);

Matthew M. Griffin, Mountain View, CA (US);

Assignee:

Rambus Inc., Los Altos, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output driver circuit and current control technique to facilitate high-speed buses with low noise is used to interface with high-speed dynamic RAMs (DRAMs). The architecture includes the following components: an input isolation block (), an analog voltage divider (), an input comparator (), a sampling latch (), a current control counter (), and a bitwise output driver (output driver Aand output driver B).


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