The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2008
Filed:
Jul. 22, 2005
Michael Specht, Munich, DE;
Franz Hofmann, Munich, DE;
Johannes Luyken, Munich, DE;
Infineon Technologies AG, Munich, DE;
Abstract
The invention relates to a method for fabricating stacked non-volatile memory cells. Further, the invention relates to stacked non-volatile memory cells. The invention particularly relates to the field of non-volatile NAND memories having non-volatile stacked memory cells. The stacked non-volatile memory cells are formed on a semiconductor wafer, having a bulk semi-conductive substrate and an SOI semi-conductive layer and are arranged as a bulk FinFET transistor and an SOI FinFet transistor being arranged on top of the bulk FinFET transistor. Both the FinFET transistor and the SOI FinFet transistor are attached to a common charge-trapping layer. A word line with sidewalls is arranged on top of said patterned charge-trapping layer and a spacer oxide layer is arranged on the sidewalls of said word line.