The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2008

Filed:

Nov. 10, 2005
Applicants:

Seung Woo Jin, Icheon-shi, KR;

Min Yong Lee, Seoul, KR;

Kyoung Bong Rouh, Goyang-si, KR;

Inventors:

Seung Woo Jin, Icheon-shi, KR;

Min Yong Lee, Seoul, KR;

Kyoung Bong Rouh, Goyang-si, KR;

Assignee:

Hynix Semiconductor Inc., Gyunggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation for control of the threshold voltage and junction ion implantation for formation of source/drain regions, on the entire surface of the semiconductor substrate having the gate stack formed thereon. In accordance with the present invention, since ion implantation is carried out after formation of the gate stack involving a thermal process, there are no changes in concentrations of implanted dopants due to heat treatment upon formation of the gate stack.


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