The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2008
Filed:
Jul. 13, 2005
Shine Chien Chung, Taipei Hsien, TW;
Yung-chin Hou, Taipei, TW;
Kun Lung Chen, Taipei, TW;
Yu-chun Wu, Allentown, PA (US);
Shine Chien Chung, Taipei Hsien, TW;
Yung-Chin Hou, Taipei, TW;
Kun Lung Chen, Taipei, TW;
Yu-Chun Wu, Allentown, PA (US);
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A configurable logic and memory block (CLMB) and a configurable logic device are disclosed. The CLMB includes one or more static random access memory (SRAM) cells, a first output module for generating a first output by reading at least one SRAM cell when the CLMB functions as an SRAM, a second output module for generating a second output by reading at least one SRAM cell when the CLMB functions as a program logic device (PLD), wherein data on one or more bitlines coupled to the SRAM cells are controllably feeding into the first and second output modules. The configurable logic device can provide various Boolean logic functions using pass gates.