The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2008
Filed:
May. 12, 2006
Youn-seok Jeong, Seoul, KR;
Chung-woo Kim, Suwon-si, KR;
Hee-soon Chae, Yongin-si, KR;
Ju-hyung Kim, Seongnam-si, KR;
Jeong-hee Han, Suwon-si, KR;
Jae-woong Hyun, Uijeongbu-si, KR;
Youn-seok Jeong, Seoul, KR;
Chung-woo Kim, Suwon-si, KR;
Hee-soon Chae, Yongin-si, KR;
Ju-hyung Kim, Seongnam-si, KR;
Jeong-hee Han, Suwon-si, KR;
Jae-woong Hyun, Uijeongbu-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A method of programming a silicon oxide nitride oxide semiconductor (SONOS) memory device is provided. The SONOS memory device includes a substrate, first and second impurity regions spaced apart on the substrate, a gate oxide layer formed over the substrate between the first and second impurity regions, a trap layer formed over the gate oxide layer, an insulation layer formed over the trap layer, and a gate electrode formed over the insulation layer. The method of programming the SONOS device includes writing data into the SONOS memory device by applying a first voltage to the first impurity region, a gate voltage to the gate electrode, and a second voltage to the second impurity region, where the second voltage is a negative voltage.