The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2008

Filed:

Mar. 24, 2006
Applicants:

Jon S. Choy, Austin, TX (US);

Tahmina Akhter, Austin, TX (US);

Inventors:

Jon S. Choy, Austin, TX (US);

Tahmina Akhter, Austin, TX (US);

Assignee:

Intersil Americas Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A charge pump system including a clock circuit and a charge pump circuit is provided. The clock circuit provides a first clock with a frequency based on a memory block select signal indicative of load capacitance of a charge node. The charge pump circuit receives the first clock and charges the charge node at a rate based on the frequency of the first clock and the load capacitance of the charge node. The memory block select signal indicates which of the memory blocks are coupled to the charge node and thus indicates the load capacitance of the charge node. The frequency of the first clock is adjusted based on the load capacitance of the selected block so that the slew rate of the charge node is about the same. Thus, the slew rate of the voltage ramp on the charge node is about the same regardless of the load capacitance.


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