The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7348235 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 25, 2008

Filed:

Apr. 27, 2006
Applicant:

Yoshitaka Fujiishi, Tokyo, JP;

Inventor:

Yoshitaka Fujiishi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract

An isolation insulation film is formed in an isolation trench in an upper portion of a silicon substrate. The isolation insulation film has an opening by which inner walls and bottom of the isolation trench are exposed. A lower diffusion layer serving as a lower electrode of capacitors of DRAM cells extends into the inner walls of the isolation trench exposed by the opening, and a dielectric layer is formed in almost constant thickness on the inner walls and bottom of the isolation trench exposed by the opening. An upper electrode is partially buried in the opening. A channel cut layer is formed in the vicinity of the bottom of the opening.


Find Patent Forward Citations

Fujiishi, Yoshitaka. (2008). Semiconductor device and method of manufacturing the same (U.S. Patent No. 7348235). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7348235

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