The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2008
Filed:
Oct. 10, 2003
Horia Toma, Mountain View, CA (US);
Thorsten Heiner Groetker, Aachen, DE;
Srinivas Bongoni, Irvine, CA (US);
Andrea Kroll, Milpitas, CA (US);
Horia Toma, Mountain View, CA (US);
Thorsten Heiner Groetker, Aachen, DE;
Srinivas Bongoni, Irvine, CA (US);
Andrea Kroll, Milpitas, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
To perform a simulation, a design can be divided into 'blocks' described by models. To ensure that data is efficiently transferred from an source model to a destination model, a dynamic first-in first-out (FIFO) can be placed between these models. The initial size of the dynamic FIFO can be set to a relatively small value. To prevent deadlock, the size of the FIFO can be automatically increased in size by increments. In this manner, the memory resources of the FIFO can be tightly controlled. Advantageously, the size of the optimized dynamic FIFO can be used as the desired size of the FIFO implemented in silicon, thereby also ensuring efficient use of silicon resources.