The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2008

Filed:

Mar. 03, 2006
Applicants:

Corvin Liaw, Munich, DE;

Heinz Hoenigschmid, Poecking, DE;

Milena Dimitrova, Munich, DE;

Michael Angerbauer, Palling, DE;

Inventors:

Corvin Liaw, Munich, DE;

Heinz Hoenigschmid, Poecking, DE;

Milena Dimitrova, Munich, DE;

Michael Angerbauer, Palling, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and a circuit configuration for generating a reference voltage in a resistive semiconductor memory includes generating a reference voltage by connecting together two bitlines having different voltages. This method for generating a reference voltage can be used in a method and in a circuit configuration for reading at least one memory cell of a resistive memory cell array in a semiconductor memory. The generated reference voltage and a voltage dependent on the content of a resistive memory cell are applied to an amplifier to determine the content of the memory cell. The content of the memory cell is determined dependent on a relationship between the reference voltage and the voltage dependent on the content of the memory cell.


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