The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2008

Filed:

Dec. 30, 2004
Applicant:

Su Jin OH, Seoul, KR;

Inventor:

Su Jin Oh, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming metal wirings for a semiconductor device. A first etch stop layer, an dielectric layer, a second etch stop layer, and a wiring layer are deposited on a semiconductor substrate. A hole is formed by etching the wiring layer, the first etch stop layer, and the dielectric layer. A trench is formed by etching the wiring layer. The exposed first and second etch stop layers are removed after removal of the trench pattern. A barrier metal layer is deposited on inner walls of the hole and the trench. Grooves are formed on the barrier metal layer. A metal seed layer is deposited on the barrier metal layer. A metal thin layer is deposited inside the hole and the trench. The metal thin layer, the metal seed layer, and the barrier metal layer on the wiring layer are removed.


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