The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2008

Filed:

Jun. 29, 2005
Applicants:

Eiji Yasuda, Takatsuki, JP;

Kenichi Hidaka, Takatsuki, JP;

Yasuyuki Masumoto, Otsu, JP;

Tadayoshi Nakatsuka, Toyonaka, JP;

Atsushi Watanabe, Kadoma, JP;

Katsushi Tara, Kyoto, JP;

Inventors:

Eiji Yasuda, Takatsuki, JP;

Kenichi Hidaka, Takatsuki, JP;

Yasuyuki Masumoto, Otsu, JP;

Tadayoshi Nakatsuka, Toyonaka, JP;

Atsushi Watanabe, Kadoma, JP;

Katsushi Tara, Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01P 1/10 (2006.01); H01P 5/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A diode logic circuit which can select a high voltage from among the voltages of a number of control voltage input terminals using a number of diodes made of Schottky junctions is integrally formed on a compound semiconductor substrate on which MESFET stages for switching and for securing isolations have been formed. In addition, the MESFET stages for switching are controlled by the voltages of the number of control voltage input terminals and the MESFET stages for securing isolations are controlled by the OR voltage that is outputted from the diode logic circuit.


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