The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2008
Filed:
Jul. 29, 2005
Dureseti Chidambarrao, Weston, CT (US);
Donald L. Jordan, Weybridge, VT (US);
Judith H. Mccullen, Essex Junction, VT (US);
David M. Onsongo, Newburgh, NY (US);
Tina Wagner, Newburgh, NY (US);
Richard Q. Williams, Essex Junction, VT (US);
Dureseti Chidambarrao, Weston, CT (US);
Donald L. Jordan, Weybridge, VT (US);
Judith H. McCullen, Essex Junction, VT (US);
David M. Onsongo, Newburgh, NY (US);
Tina Wagner, Newburgh, NY (US);
Richard Q. Williams, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
System and method for compact model algorithms to accurately account for effects of layout-induced changes in nitride liner stress in semiconductor devices. The layout-sensitive compact model algorithms account for the impact of large layout variation on circuits by implementing algorithms for obtaining the correct stress response approximations and layout extraction algorithms for obtaining the correct geometric parameters that drive the stress response. In particular, these algorithms include specific information from search 'buckets' that are directionally-oriented and include directionally-specific distance measurements for analyzing in detail the specific shape neighborhood of the semiconductor device. The algorithms are additionally adapted to enable the modeling and stress impact determination of a device having single stress liner film and dual-stress liners (two different liner films that abut at an interface).