The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2008
Filed:
Jul. 03, 2007
Chaoyong LI, Singapore, SG;
Siaw Suian Sabrina Su, Singapore, SG;
Moitreyee Mukherjee-roy, Singapore, SG;
Ramana Murthy Badam, Singapore, SG;
Chaoyong Li, Singapore, SG;
Siaw Suian Sabrina Su, Singapore, SG;
Moitreyee Mukherjee-Roy, Singapore, SG;
Ramana Murthy Badam, Singapore, SG;
Agency for Science, Technology and Research, Singapore, SG;
Abstract
A semiconductor device, having a composite barrier layer, comprising the following. A substrate has a dielectric layer formed thereover and having an opening within the dielectric layer. The opening exposes a first portion of the substrate. A composite barrier layer lines the opening. The composite barrier layer comprises: a dielectric flash layer within the opening and lining the opening wherein the dielectric flash layer does not cover the first exposed portion of the substrate; an aluminum layer over the dielectric flash layer and over the first exposed portion of the substrate; and a barrier metal layer over the aluminum layer. Wherein the dielectric flash layer, the aluminum layer and the barrier metal layer comprise the composite barrier layer. A planarized metal plug is within the barrier metal layer lined opening.