The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2008
Filed:
Dec. 22, 2005
Timothy H. Daubenspeck, Colchester, VT (US);
Jeffrey P. Gambino, Westford, VT (US);
Stephen E. Luce, Underhill, VT (US);
Thomas L. Mcdevitt, Underhill, VT (US);
William T. Motsiff, Essex Junction, VT (US);
Mark J. Pouliot, Bristol, VT (US);
Jennifer C. Robbins, Richmond, VT (US);
Timothy H. Daubenspeck, Colchester, VT (US);
Jeffrey P. Gambino, Westford, VT (US);
Stephen E. Luce, Underhill, VT (US);
Thomas L. McDevitt, Underhill, VT (US);
William T. Motsiff, Essex Junction, VT (US);
Mark J. Pouliot, Bristol, VT (US);
Jennifer C. Robbins, Richmond, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A crack stop for low K dielectric materials of an integrated circuit (IC) formed on an IC chip using metal interconnects which do not form a self-passivating oxide layer, such as copper or silver interconnects, in a low-K dielectric material to prevent damage to the active area of the IC chip caused by chipping and cracking formed along peripheral edges of the IC chip during a dicing operation. A moisture barrier or edge seal is formed as a metal stack positioned along the outer peripheral edges of the active area of the IC chip. The crack stop is formed by at least one trench or groove positioned outside of the moisture barrier/edge seal on the outer periphery of the IC chip.