The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2008

Filed:

Dec. 13, 2004
Applicants:

Matthias Dinter, Holzkirchen, DE;

Juergen Dirks, Holzkirchen, DE;

Roland Klemt, Forstern, DE;

Inventors:

Matthias Dinter, Holzkirchen, DE;

Juergen Dirks, Holzkirchen, DE;

Roland Klemt, Forstern, DE;

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A library cell, a method and/or a system for adding the cell to a circuit is disclosed. The method generally comprises a first step for generating a final layout of the cell having an area of interest in at least one upper layer within a first layer stack used for the circuit, the first layer stack including at most all of a plurality of physical layers available for fabrication. A second step may include placing the final layout in the circuit. A third step may route a network of the circuit through the cell using the at least one upper layer and avoiding the area of interest according to at least one of a plurality of rules.


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