The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2008
Filed:
Mar. 15, 2005
Applicants:
Arvind Kumar, Brookline, MA (US);
Narayanan Natarajan, Shrewsbury, MA (US);
Mahalingam Nagarajan, Grafton, MA (US);
Inventors:
Arvind Kumar, Brookline, MA (US);
Narayanan Natarajan, Shrewsbury, MA (US);
Mahalingam Nagarajan, Grafton, MA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
An apparatus for controllably distorting the duty cycle of a clock signal is disclosed. Methods and systems using embodiments of the invention are also described.
Kumar, Arvind. (2008). Method and apparatus for distorting duty cycle of a clock (U.S. Patent No. 7332947). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7332947
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile