The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2008

Filed:

Aug. 01, 2005
Applicants:

Joseph M. Jeddeloh, Shoreview, MN (US);

Robert Totorica, Boise, ID (US);

Inventors:

Joseph M. Jeddeloh, Shoreview, MN (US);

Robert Totorica, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); H03M 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A testing method and system is used to test memory modules each of which has a memory hub coupled to a plurality of memory devices. The testing system and method includes a test interface circuit having a memory interface that is coupled to transmit and receive memory signals to and from a tester through a memory bus. The test interface circuit couples test signals to the memory hub in the memory module through a communications link responsive to command, address and data signals received from the tester. The test interface circuit also receives signals from the memory hub in the memory module through the communications link that are indicative of the response of the memory module to the test signals. The test interface circuit then provides corresponding results data to the tester.


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