The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2008

Filed:

Dec. 19, 2005
Applicant:

Shinichi Imai, Hirakata, JP;

Inventor:

Shinichi Imai, Hirakata, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a semiconductor device is provided in which it is possible to perform process control taking account of wafer information and to deal with the process control in which a recipe is change from one wafer to another. The method comprises steps of inserting a process control system into the path of a network where a manufacturing execution system (MES) and a manufacturing apparatus are connected with each other by using a LAN, obtaining a process result on the lot of the wafers at a previous step through the use of the process control system to rewrite the process recipe, and transmitting the rewritten process recipe from the process control system to the manufacturing apparatus. Since the method includes the step of obtaining the process result on the lot effected at the previous step as wafer information, it is possible to calculate a control parameter taking account of the state of the wafers. Also, since a process control (APC) system is inserted between the MES and the apparatus, there is no communication between the MES and the APC system, so that a communication burden is reduced, thereby the process control can be performed from one wafer to another.


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