The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Aug. 31, 2004
Michael J. Hill, Gilbert, AZ (US);
Weimin Shi, Portland, OR (US);
Michael J. Hill, Gilbert, AZ (US);
Weimin Shi, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Reduce breakdown voltage and control breakdown path for electrostatic discharge to terminals of microelectronic packages, such as no-connect Land Grid Array (LGA) pads. In one embodiment, solder resist openings with a small separation distance are used to provide an air breakdown path between a no-connect LGA pad and the surrounding metal and to reduce the breakdown voltage. In one implementation, the no-connect pad has a non-round shape with a protruding portion on the dielectric layer. The air surrounding a solder resist opening over the tip of the protruding portion of the no-connect pad and a nearby solder resist opening over the surrounding metal provides a shortest air breakdown path and the lowest breakdown voltage. Alternatively, sharp features (e.g., metal traces) with a minimum separation distance can be arranged pointing at each other under the solder resist layer, or other dielectric layer inside the package, to provide a non-exposed breakdown path.