The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2008

Filed:

Nov. 30, 2004
Applicants:

Kazuo Otsuga, Kokubunji, JP;

Hideaki Kurata, Kodaira, JP;

Yoshitaka Sasago, Tachikawa, JP;

Inventors:

Kazuo Otsuga, Kokubunji, JP;

Hideaki Kurata, Kodaira, JP;

Yoshitaka Sasago, Tachikawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A low cost semiconductor nonvolatile memory device capable of high speed programming, using an inversion layer as the wiring, and a manufacturing method for that device. The semiconductor memory device includes an auxiliary electrode at a position between and in parallel with the source and drain regions and with no position overlap versus the source region and the drain region formed mutually in parallel; wherein the auxiliary electrode for hot electron source injection is utilized as the auxiliary electrode for programming (writing); and an inversion layer formed below the auxiliary electrode is utilized as the source region or as the drain region during the read operation.


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