The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 15, 2008
Filed:
Feb. 02, 2005
Prashant Jain, Sunnyvale, CA (US);
Kenneth K. Chan, Saratoga, CA (US);
Kumarasamy Palanisamy, Sunnyvale, CA (US);
Chishein Ju, Cupertino, CA (US);
Prashant Jain, Sunnyvale, CA (US);
Kenneth K. Chan, Saratoga, CA (US);
Kumarasamy Palanisamy, Sunnyvale, CA (US);
Chishein Ju, Cupertino, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A method provides for verifying soft error handling in an integrated circuit (IC) design. A diagnostic program is executed on a virtual IC based on the IC design using a simulator. A soft error is injected into the virtual IC to trigger hardware error correction in the virtual IC and a software exception. A record of a type and a location of the soft error at the time of the injecting is created. The error log generated by hardware error correction is then compared with the record of injected error, the hardware error correction being part of the virtual IC. An IC design flaw is indicated when a discrepancy exists between the error log and the record of the injected error.