The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2008

Filed:

Sep. 02, 2005
Applicants:

Min-chul Sun, Suwon-si, KR;

Ja-hum Ku, Seongnam-si, KR;

Brian J. Greene, Yorktown Heights, NY (US);

Manfred Eller, Wappingers Falls, NY (US);

Wee Lang Tan, Beacon, NY (US);

Sunfei Fang, LaGrangeville, NY (US);

Zhijiong Luo, Carmel, NY (US);

Inventors:

Min-chul Sun, Suwon-si, KR;

Ja-hum Ku, Seongnam-si, KR;

Brian J. Greene, Yorktown Heights, NY (US);

Manfred Eller, Wappingers Falls, NY (US);

Wee Lang Tan, Beacon, NY (US);

Sunfei Fang, LaGrangeville, NY (US);

Zhijiong Luo, Carmel, NY (US);

Assignee:

Samsung Electronics Co., Ltd., Suwon-Si, Geyonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test structure of a semiconductor device is provided. The test structure includes a semiconductor substrate, a transistor which includes a gate electrode formed on first and second active regions defined within the semiconductor substrate, and first and second junction regions which are arranged at both sidewalls of the gate electrode to reside within the first and second active regions and are silicided, and first and second pads through which electrical signals are applied to the silicided first and second junction regions and detected and which are formed on the same level as the gate electrode or the semiconductor substrate.


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