The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2008

Filed:

Apr. 07, 2006
Applicants:

Franck Badets, Meylan, FR;

Didier Belot, Rives, FR;

Vincent Lagareste, Brignoud, FR;

Yann Deval, Bordeaux, FR;

Pierre Melchior, Andernos, FR;

Jean-baptiste Begueret, Talence, FR;

Inventors:

Franck Badets, Meylan, FR;

Didier Belot, Rives, FR;

Vincent Lagareste, Brignoud, FR;

Yann Deval, Bordeaux, FR;

Pierre Melchior, Andernos, FR;

Jean-Baptiste Begueret, Talence, FR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03L 7/07 (2006.01); H03L 7/087 (2006.01);
U.S. Cl.
CPC ...
Abstract

A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.


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