The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 01, 2008

Filed:

Nov. 24, 2003
Applicants:

Shinji Ohuchi, Tokyo, JP;

Yasushi Shiraishi, Tokyo, JP;

Inventors:

Shinji Ohuchi, Tokyo, JP;

Yasushi Shiraishi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device in accordance with the present invention reduces cracks occurring in a junction between a semiconductor device and a mounting substrate due to a heat stress when the semiconductor device is mounted on a printed circuit board or the like. The semiconductor device has a semiconductor element having a thickness of 200 μm or less, an electrode pad formed an the semiconductor element, a post electrically connected to the electrode pad, and a sealing resin for sealing a surface where circuitry is formed and the post. Furthermore, a manufacturing method for a semiconductor device in accordance with the present invention includes a step for forming an electrode pad on a main surface of a semiconductor wafer, a step for forming a post to be connected to the electrode pad, a step for resin-sealing the main surface of the semiconductor wafer and the post, a step for forming a groove from a surface of the resin to a predetermined depth of the semiconductor wafer, and a step for polishing a rear surface of the semiconductor wafer to a bottom of the groove and dividing the semiconductor wafer into individual semiconductor devices.


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