The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2007
Filed:
Feb. 05, 2004
Qi Xiang, San Jose, CA (US);
Paul R. Besser, Sunnyvale, CA (US);
Minh Van Ngo, Fremont, CA (US);
Eric N. Paton, Morgan Hill, CA (US);
Haihong Wang, Fremont, CA (US);
Qi Xiang, San Jose, CA (US);
Paul R. Besser, Sunnyvale, CA (US);
Minh Van Ngo, Fremont, CA (US);
Eric N. Paton, Morgan Hill, CA (US);
Haihong Wang, Fremont, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An integrated circuit includes multiple layers. A semiconductor-on-insulator (SOI) wafer can be used to house transistors. Two substrates or wafers can be bonded to form the multiple layers. A strained semiconductor layer can be between a silicon germanium layer and a buried oxide layer. A hydrogen implant can provide a breaking interface to remove a silicon substrate from the silicon germanium layer.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile