The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2007

Filed:

Feb. 24, 2005
Applicants:

Connie Pin-chin Wang, Mountain View, CA (US);

LU You, San Jose, CA (US);

Zoran Krivokapic, Santa Clara, CA (US);

Paul Raymond Besser, Sunnyvale, CA (US);

Suzette Keefe Pangrle, Cupertino, CA (US);

Inventors:

Connie Pin-Chin Wang, Mountain View, CA (US);

Lu You, San Jose, CA (US);

Zoran Krivokapic, Santa Clara, CA (US);

Paul Raymond Besser, Sunnyvale, CA (US);

Suzette Keefe Pangrle, Cupertino, CA (US);

Assignees:

Spansion LLC, Sunnyvale, CA (US);

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device having a metal nanocrystal charge storage structure and a method for its manufacture. The memory device may be manufactured by forming a first oxide layer on the semiconductor substrate, then disposing a porous dielectric layer on the oxide layer and disposing a second oxide layer on the porous dielectric layer. A layer of electrically conductive material is formed on the second layer of dielectric material. An etch mask is formed on the electrically conductive material. The electrically conductive material and the underlying dielectric layers are anisotropically etched to form a dielectric structure on which a gate electrode is disposed. A metal layer is formed on the dielectric structure and the gate electrode and treated so that portions of the metal layer diffuse into the porous dielectric layer. Then the metal layer is removed.


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