The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2007
Filed:
May. 19, 2005
Kunisato Yamaoka, Osaka, JP;
Hiroshige Hirano, Nara, JP;
Yasushi Gohou, Osaka, JP;
Shunichi Iwanari, Kyoto, JP;
Yasuo Murakuki, Kyoto, JP;
Masahiko Sakagami, Kyoto, JP;
Tetsuji Nakakuma, Shiga, JP;
Takashi Miki, Hyogo, JP;
Kunisato Yamaoka, Osaka, JP;
Hiroshige Hirano, Nara, JP;
Yasushi Gohou, Osaka, JP;
Shunichi Iwanari, Kyoto, JP;
Yasuo Murakuki, Kyoto, JP;
Masahiko Sakagami, Kyoto, JP;
Tetsuji Nakakuma, Shiga, JP;
Takashi Miki, Hyogo, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
A ferroelectric memory of the present invention comprises: a plurality of normal cells, each of which includes a first ferroelectric capacitor for holding data and a first transistor connected to a first electrode of the first ferroelectric capacitor; a first bit line connected to the first transistor; a first bit line precharge circuit which is a switch circuit provided between the first bit line and a ground; and a word line connected to a gate of the first transistor. The word line is deactivated to disconnect the first ferroelectric capacitor from the first bit line before the first bit line precharge circuit is driven to discharge a potential of the first bit line.