The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2007
Filed:
Apr. 17, 2006
Angelo Magri', Belpasso, IT;
Ferruccio Frisina, Sant' Agata Li Battiati, IT;
Giuseppe Ferla, Catania, IT;
Marco Camalleri, Palermo, IT;
Angelo Magri', Belpasso, IT;
Ferruccio Frisina, Sant' Agata Li Battiati, IT;
Giuseppe Ferla, Catania, IT;
Marco Camalleri, Palermo, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Abstract
A vertical-conduction and planar-structure MOS device having a double thickness gate oxide includes a semiconductor substrate including spaced apart active areas in the semiconductor substrate and defining a JFET area therebetween. The JFET area also forms a channel between the spaced apart active areas. A gate oxide is on the semiconductor substrate and includes a first portion having a first thickness on the active areas and at a periphery of the JFET area, and a second portion having a second thickness on a central area of the JFET area. The second thickness is greater than the first thickness. The JFET area also includes an enrichment region under the second portion of the gate oxide.