The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2007
Filed:
Jun. 14, 2005
Chun-yao Wang, Hsinchu, TW;
Jan-an Hsieh, Hsinchu, TW;
Shih-chieh Wu, Hsinchu, TW;
National Tsing Hua University, Hsinchu, TW;
Abstract
A method for verifying a circuit design includes a step of assigning numerical values 1/ato input ports of the circuit design according to a function a=(a−1)+1, wherein i represents the number of the input port and the numerical value ais not equal to 2 or 1. Preferably, ais equal to or larger than 3, and is a positive integer. Particularly, the numerical value represents l's probability. In addition, the present method further includes a step of calculating an output value at an output port of the circuit design based on the numerical values assigned to the input port, and calculating the output value is performed from the input port to the output port at a Boolean gate level.