The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2007

Filed:

Jul. 12, 2005
Applicants:

Satoru Yamamoto, Takasaki, JP;

Kazuhisa Okada, Takasaki, JP;

Inventors:

Satoru Yamamoto, Takasaki, JP;

Kazuhisa Okada, Takasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit with a PLL (Phase Locked Loop) built therein is used in a semiconductor integrated circuit for wireless communication. The PLL circuit generates an oscillation signal having a predetermined frequency, which is combined with a receive signal or a transmit signal for wireless communication. The PLL circuit includes a VCO capable of switching an oscillation frequency band, a variable divider, a loop filter and a phase comparator. An oscillation frequency of the VCO is controlled according to the difference in phase between a signal obtained by dividing the output of the VCO and a reference signal, and a discrimination circuit makes a decision as to a lead or delay of the phase of an output of the variable divider with respect to a reference signal having a predetermined frequency. An auto band selection circuit generates a signal for selecting a frequency band for the VCO.


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