The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2007
Filed:
Dec. 09, 2004
Darvin R. Edwards, Garland, TX (US);
Darvin R. Edwards, Garland, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A predictive power regulation apparatus and method that minimizes power and ground bounce in a logic device. The apparatus includes a predictor and a voltage or current smoothing device connected to the predictor. The voltage or current smoothing device outputs adjusted voltage or current to power and ground planes of the logic device. In one embodiment, the predictor includes an instruction scanner device and a look-up table connected to the instruction scanner device. The instruction scanner device determines the next instruction to be executed by the logic device. A voltage/current scheduling buffer connected to the look-up table contains voltage and current compensation and the time at which the voltage or current compensation should be requested from the voltage or current smoothing device. An alternative predictive power regulation apparatus is described that reduces power and ground bounce caused by the I/O buffer circuitry switching in the logic device.