The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 23, 2007

Filed:

Aug. 28, 2003
Applicants:

Ruban Kanapathippillai, Dublin, CA (US);

Kumar Ganapathy, Palo Alto, CA (US);

Thu Nguyen, Saratoga, CA (US);

Siva Venkatraman, San Jose, CA (US);

Earle F. Philhower, Iii, Union City, CA (US);

Manoj Mehta, Laguna Hills, CA (US);

Kenneth Malich, Norco, CA (US);

Inventors:

Ruban Kanapathippillai, Dublin, CA (US);

Kumar Ganapathy, Palo Alto, CA (US);

Thu Nguyen, Saratoga, CA (US);

Siva Venkatraman, San Jose, CA (US);

Earle F. Philhower, III, Union City, CA (US);

Manoj Mehta, Laguna Hills, CA (US);

Kenneth Malich, Norco, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit comprising a reduced instruction set computer (RISC) controller to execute RISC instructions, one or more digital signal processing (DSP) units to execute DSP instructions, and a unified instruction pipeline coupled to the RISC controller and the one or more DSP units, the unified instruction pipeline to decode and initiate execution of the RISC instructions and the DSP instructions of a unified RISC and DSP instruction set, the unified instruction pipeline to decode and initiate the RISC instructions when the DSP instructions are inactive, and to decode and initiate the DSP instructions when the RISC instructions are inactive.


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