The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2007
Filed:
Oct. 12, 2005
Applicants:
Ling Kuey Yang, Changhua, TW;
Chen Chin Liu, Hsinchu, TW;
Lan Ting Huang, Kaohsiung, TW;
Po Hsuan Wu, Hsinchu, TW;
Inventors:
Ling Kuey Yang, Changhua, TW;
Chen Chin Liu, Hsinchu, TW;
Lan Ting Huang, Kaohsiung, TW;
Po Hsuan Wu, Hsinchu, TW;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01);
U.S. Cl.
CPC ...
Abstract
A BLT can include a different channel length, channel width, or both to compensate for bit line loading effects. The channel length and/or channel width of the transistor structure can be configured so as to achieve a desired loading. Thus, the bit line transistor structure can improve global metal bit line loading uniformity and provide greater uniformity in bit line bias. Additionally, the greater uniformity in bit line bias can improve reliability.