The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Aug. 05, 2005
Rita Zappa, Milan, IT;
Carolina Selva, Cologno Monzese, IT;
Danilo Rimondi, Mozzo, IT;
Cosimo Torelli, Cernusco sul Naviglio, IT;
Rita Zappa, Milan, IT;
Carolina Selva, Cologno Monzese, IT;
Danilo Rimondi, Mozzo, IT;
Cosimo Torelli, Cernusco sul Naviglio, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Abstract
A built-in self-test and self-repair structure (BISR) of memory arrays embedded in an integrated device includes at least a test block (BIST) programmable to execute on a respective memory array of the device any of a certain number of test algorithms, and a self-repair block that includes a column address generator processing the faulty address information for allocating redundant resources of the tested memory array. The BISR may further include a redundancy register on which final redundancy information is loaded at each power-on of the device and control logic for managing data transfer from external circuitry to the built-in self-test and self-repair structure (BISR) and vice versa. The BIST structure serves any number of embedded memory arrays even of different types and sizes.