The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Aug. 14, 2006
Martin L. Voogel, Los Altos, CA (US);
David P. Schultz, San Jose, CA (US);
Vasisht M. Vadi, San Jose, CA (US);
Philip D. Costello, Saratoga, CA (US);
Venu M. Kondapalli, Sunnyvale, CA (US);
Martin L. Voogel, Los Altos, CA (US);
David P. Schultz, San Jose, CA (US);
Vasisht M. Vadi, San Jose, CA (US);
Philip D. Costello, Saratoga, CA (US);
Venu M. Kondapalli, Sunnyvale, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Method and apparatus for data monitoring for error detection is described. A programmable logic device includes a configurable logic block having function generators, each of which is configurable for at least two programmable mode functions. The function generators are coupled to an array of memory cells for storing configuration bits for configuring the function generators. A primary address line is coupled to each memory cell spanning two or more of the function generators. A secondary address line is coupled to groups of memory cells associated with the function generators. A mask circuit is configured to selectively communicate a signal of the primary address line to a segment of the secondary address line or to a ground responsive in part to the program mode function.