The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2007

Filed:

Feb. 11, 2005
Applicants:

Masood Ahmed Khan, Cedar Park, TX (US);

Michael Ju Hyeok Lee, Austin, TX (US);

Ed Seewann, Austin, TX (US);

Inventors:

Masood Ahmed Khan, Cedar Park, TX (US);

Michael Ju Hyeok Lee, Austin, TX (US);

Ed Seewann, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A content addressable memory (CAM) system is disclosed including a dual mode cycle boundary latch (CBL). The CBL includes a master latch coupled to a slave latch. The CBL operates in a high speed functional mode and a lower speed test mode. In the high speed functional mode, input data bypasses the master latch and transports directly to the CBL output via the slave latch. The CBL effectively removes the master latch from the circuit in the high speed functional mode. However, in the lower speed test mode, input test data travels via both the master and slave latches to the CBL output.


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