The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
May. 11, 2004
Ping Jiang, Plano, TX (US);
Hyesook Hong, Allen, TX (US);
Ting Yiu Tsui, Garland, TX (US);
Robert Kraft, Plano, TX (US);
Ping Jiang, Plano, TX (US);
Hyesook Hong, Allen, TX (US);
Ting Yiu Tsui, Garland, TX (US);
Robert Kraft, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An embodiment of the invention is a method of manufacturing a semiconductor wafer. The method includes depositing spin-on-glass material over the semiconductor wafer (step), modifying a top surface of the spin-on glass material to form a SiOlayer (step), applying a vapor prime (step), forming a photoresist layer over the spin-on-glass material (step), patterning the photoresist layer (step), and then etching the semiconductor wafer (step). Another embodiment of the invention is a method of manufacturing a dual damascene back-end layer on a semiconductor wafer. The method includes depositing spin-on-glass material over the dielectric layer and within the via holes (step), modifying a top surface of the spin-on glass material to form a SiOlayer (step), applying a vapor prime (step), forming a photoresist layer over said spin-on-glass material (step), patterning the photoresist layer (step), and etching trench spaces (step).
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile