The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2007
Filed:
Jan. 18, 2005
Kenji Kanamitsu, Hitachinaka, JP;
Takashi Moriyama, Tsuchiura, JP;
Naohiro Hosoda, Hitachinaka, JP;
Keiichi Haraguchi, Hitachinaka, JP;
Tetsuo Adachi, Hitachinaka, JP;
Kenji Kanamitsu, Hitachinaka, JP;
Takashi Moriyama, Tsuchiura, JP;
Naohiro Hosoda, Hitachinaka, JP;
Keiichi Haraguchi, Hitachinaka, JP;
Tetsuo Adachi, Hitachinaka, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
An AND flash memory of the type wherein a memory cell is constituted of n-type semiconductor regions (a source and a drain) formed in a p-type well of a semiconductor substrate and three gates (including a floating gate, a control gate and a selective gate) is manufactured. In the manufacture, arsenic (As) is introduced into a p-type well in the vicinity of one of side walls of the selective gate to form n-type semiconductor regions (a source and a drain). Thereafter, to cope with a drain disturb problem, the substrate is thermally treated by use of an ISSG (In-Situ Steam Generation) oxidation method so that a first gate, insulating film disposed in the vicinity of one of side walls, at which the n-type semiconductor regions have been formed, is formed thick.