The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2007

Filed:

Feb. 09, 2001
Applicants:

Kentaro Shiomi, Osaka, JP;

Akira Motohara, Hyogo, JP;

Makoto Fujiwara, Kyoto, JP;

Toshiyuki Yokoyama, Kyoto, JP;

Katsuya Fujimura, Kyoto, JP;

Inventors:

Kentaro Shiomi, Osaka, JP;

Akira Motohara, Hyogo, JP;

Makoto Fujiwara, Kyoto, JP;

Toshiyuki Yokoyama, Kyoto, JP;

Katsuya Fujimura, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

An encryption process is employed in the LSI design so as to improve confidentiality of the circuit design data over conventional examples. In the encryption process, confidential circuit design data is encrypted to produce encrypted design data and a cipher key. The encrypted design data is provided to the user who conducts a design/verification process. The key is also provided as required. In the design/verification process, the encrypted design data is subjected to various processes without disclosing the contents of the original circuit. In a decoding process, the encrypted design data subjected to the design/verification process is decoded to produce original circuit design data.


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