The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Feb. 01, 2006
Shunichi Iwanari, Soraku-gun, JP;
Masahiko Sakagami, Kameoka, JP;
Hiroshige Hirano, Nara, JP;
Tetsuji Nakakuma, Otsu, JP;
Takashi Miki, Nishinomiya, JP;
Yasushi Gohou, Ibaraki, JP;
Kunisato Yamaoka, Takatsuki, JP;
Yasuo Murakuki, Kyotanabe, JP;
Shunichi Iwanari, Soraku-gun, JP;
Masahiko Sakagami, Kameoka, JP;
Hiroshige Hirano, Nara, JP;
Tetsuji Nakakuma, Otsu, JP;
Takashi Miki, Nishinomiya, JP;
Yasushi Gohou, Ibaraki, JP;
Kunisato Yamaoka, Takatsuki, JP;
Yasuo Murakuki, Kyotanabe, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
Provided is a semiconductor memory device compatible with a SRAM and capable of a high-speed data transfer operation while maintaining data reliability. An access to a memory corestarts when an external chip enable signal XCE performs a falling transition. Simultaneously, an external write enable signal XWE and an external address signal ADD are received, and a memory cell, in the memory core, corresponding to the received external address signal ADD is selected. When a data read-out from the memory cellor a data write-in to the memory cellis complete, a rewrite timeris activated in accordance with a rising transition of an external chip enable signal XCE or a rising transition of the external write enable signal XWE for performing a data rewrite for the memory cell