The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2007
Filed:
Jun. 02, 2005
Imran M. Khan, Richardson, TX (US);
Louis N. Hutter, Plano, TX (US);
James (Bob) Todd, Plano, TX (US);
Jozef C. Mitros, Richardson, TX (US);
William E. Nehrer, Soquel, CA (US);
Imran M. Khan, Richardson, TX (US);
Louis N. Hutter, Plano, TX (US);
James (Bob) Todd, Plano, TX (US);
Jozef C. Mitros, Richardson, TX (US);
William E. Nehrer, Soquel, CA (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method for manufacturing a semiconductor device that comprises forming an oxide layer over a substrate. A polysilicon layer is disposed outwardly from the oxide layer, wherein the polysilicon layer forms a floating gate. A PSG layer is disposed outwardly from the polysilicon layer and planarized. The device is pattern etched to form a capacitor channel, wherein the capacitor channel is disposed substantially above the floating gate formed from the polysilicon layer. A dielectric layer is formed in the capacitor channel disposed outwardly from the polysilicon layer. A tungsten plug operable to substantially fill the capacitor channel is formed.