Circuit for producing a variable frequency clock signal having a high frequency low jitter pulse component

Abstract

A system and method provide a pulse train clock signal having a portion appropriate for loading and loading a scan chain of a circuit under test, and a higher frequency portion with a sharp leading edge appropriate for inputting a test signal into the scan elements for transition fault testing. Embodiments provide this signal by taking as inputs to a multiplexer switch, two synchronous pulse trains, and provide edge sharpening and frequency raising to one of the signals, and input each of these signals into a multiplexer switch, and rapidly switch between these signals depending upon a selection control signal that is synchronous with each signal. The multiplexer switches between these input signals during a low valued portion of each signal so that the less sharp edge of the selection control signals and the high frequency input signal do not affect the sharp pulse of the very high frequency portion.