The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2007

Filed:

Oct. 18, 2005
Applicant:

Samuel J. Walker, Tigard, OR (US);

Inventor:

Samuel J. Walker, Tigard, OR (US);

Assignee:

Credence Systems Corporation, Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A phase locked loop circuit (PLL) has a reference terminal for receiving a reference signal and an output terminal for providing an output signal. The PLL comprises a phase comparator having first and second inputs and having an output at which it provides a signal that depends on phase difference between signals received at the first and second inputs respectively, a voltage controlled oscillator (VCO) having a control input coupled to the output of the phase comparator and having an output coupled to the output terminal of the PLL, the VCO generating an output signal having a frequency that depends on the voltage of a signal received at the control input of the VCO, a feedback path coupled to the output of the VCO for providing a feedback signal, and a bitstream generator for generating first and second pseudo random bitstreams (PRBSs) in response to the reference signal and the feedback signal respectively and applying the first and second PRBSs to the first and second inputs respectively of the phase comparator.


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