The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2007
Filed:
Sep. 11, 2006
Parag N. Madhani, Allentown, PA (US);
Paul F. Barnes, Coplay, PA (US);
Donald E. Hawk, Jr., King of Prussia, PA (US);
Kandaswamy Prabakaran, Orefield, PA (US);
Parag N. Madhani, Allentown, PA (US);
Paul F. Barnes, Coplay, PA (US);
Donald E. Hawk, Jr., King of Prussia, PA (US);
Kandaswamy Prabakaran, Orefield, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
Various systems and methods for implementing multi-mode semiconductor devices are discussed herein. For example, a multi-mode semiconductor device is disclosed that includes a device package with a number of package pins. In addition, the device includes a semiconductor die with at least two IO buffers. One of the IO buffers is located a distance from a particular package pin and another of the IO buffers is located a greater distance from the particular package pin. The IO buffer located closest to the package pin includes first bond pad electrically coupled to a circuit implementing a first interface type and a first floating bond pad, and the other IO buffer includes a second bond pad electrically coupled to a circuit implementing a second interface type and a second floating bond pad. In some cases, the first floating bond pad is electrically coupled to the circuit implementing the second interface type via a metal layer wire, and the first floating bond pad is electrically coupled to the particular package pin.