The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2007
Filed:
Dec. 30, 2002
Sridhar Ramaswamy, Folsom, CA (US);
Amit Bodas, Folsom, CA (US);
Zohar B. Bogin, Folsom, CA (US);
David E. Freker, Sacramento, CA (US);
Suryaprasad R. Kareenahalli, Folsom, CA (US);
Sridhar Ramaswamy, Folsom, CA (US);
Amit Bodas, Folsom, CA (US);
Zohar B. Bogin, Folsom, CA (US);
David E. Freker, Sacramento, CA (US);
Suryaprasad R. Kareenahalli, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A system and method for crossing clocks from a source clock to a destination clock is disclosed. In one embodiment, a source clock phase enable signal is used to enable a set of latch components to selectively input a source clock pulse. The outputs of the latch components may be selected by a multiplexor according to the phases of the destination clock. In another embodiment, a time delay may be passed into the destination clock domain and may be calculated by a number of destination clock cycle time periods. In certain circumstances, the time delay may be adjusted to compensate for longer delays in the clock crossing process.