The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2007
Filed:
Nov. 30, 2005
Paul S. Carlile, Burlington, VT (US);
Barton E. Green, Milton, VT (US);
Robert C. Jordan, Hinesburg, VT (US);
Anthony J. Perri, Jericho, VT (US);
Paul S. Carlile, Burlington, VT (US);
Barton E. Green, Milton, VT (US);
Robert C. Jordan, Hinesburg, VT (US);
Anthony J. Perri, Jericho, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A phase- or frequency-locked loop circuit () that generates an accurate output signal (ACC_SYN_OUT) even in the presence of edge-triggering-type glitches (A,B) in the input reference clock signal (REF_CLK). The locked-loop circuit includes a phase or frequency difference detector () and a glitch detector () that generates a trigger signal (GLITCH_DETECTED) upon detection of at least one glitch. The trigger signal resets the difference detector so as to abort the updating of the output signal that the glitch would otherwise cause.